@ARTICLE{6180190, author={G. {Huang} and M. S. {Bakir} and A. {Naeemi} and J. D. {Meindl}}, journal={IEEE Transactions on Components, Packaging and Manufacturing Technology}, title={Power Delivery for 3-D Chip Stacks: Physical Modeling and Design Implication}, year={2012}, volume={2}, number={5}, pages={852-859}, keywords={chip scale packaging;integrated circuit noise;nanoelectronics;power delivery network design;3D chip stack;3D integration;nanoelectronic system;power delivery path;analytical physical model;power supply noise;SPICE simulation;decap die;through-vias;Noise;Switches;Power supplies;Integrated circuit modeling;Mathematical model;Solid modeling;SPICE;3-D integration;chip/package codesign;compact physical model;power supply noise}, doi={10.1109/TCPMT.2012.2185047}, ISSN={2156-3985}, month={May},}