@ARTICLE{1638478,
author={B. {Dang} and M. S. {Bakir} and C. S. {Patel} and H. D. {Thacker} and J. D. {Meindl}},
journal={Journal of Microelectromechanical Systems},
title={Sea-of-leads MEMS I/O interconnects for low-k IC packaging},
year={2006},
volume={15},
number={3},
pages={523-530},
keywords={micromechanical devices;integrated circuit interconnections;integrated circuit packaging;system-on-chip;printed circuits;silicon;sea of leads;MEMS I/O interconnects;low-k IC packaging;mechanical compliance;coefficient of thermal expansion;Si chip;composite substrate;low stress connection;PWB substrate;wafer level packaging;IC chips;interlayer dielectrics;Cu;Micromechanical devices;Integrated circuit packaging;Lead;Dielectric substrates;Wafer scale integration;Springs;Thermal expansion;Assembly;Soldering;Failure analysis;Low-k interlayer dielectrics;microelectromechanical systems (MEMS) I/O interconnects;solder joints;underfill},
doi={10.1109/JMEMS.2006.876792},
ISSN={1941-0158},
month={June},}