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Paul K. Jo

  • Ph.D Alumni

 paul.jo@gatech.edu
 
 

Biography

  • Ph.D. in Electrical and Computer Engineering, Georgia Institute of Technology
  • MS in Electrical and Electronic Engineering, Yonsei University 2011
  • BS in Electrical and Electronic Engineering, Yonsei University 2009

Research Interests

Thesis JO-DISSERTATION-2019.pdf

All Publications

  1. T. Zheng, P. K. Jo, S. Kochupurackal Rajan and M. S. Bakir, "Electrical Characterization and Benchmarking of Polylithic Integration Using Fused-Silica Stitch-Chips With Compressible Microinterconnects for RF/mm-Wave Applications," in IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 11, no. 11, pp. 1824-1834, Nov. 2021.

  2. P. Jo, S. Kochupurackal Rajan, J. Gonzalez and M. S. Bakir, "Polylithic Integration of 2.5-D and 3-D Chiplets Enabled by Multi-Height and Fine-Pitch CMIs,"  in IEEE Transactions on Components, Packaging and Manufacturing Technology, Jul.2020.

  3. T. Zheng, P. K. Jo, S. Kochupurackal Rajan, and M. S. Bakir, "Polylithic integration for RF/mm-wave chiplets using stitch-chips: modeling, fabrication, and characterization," 2020 IEEE MTT-S International Microwave Symposium (IMS), Los Angeles, CA, Jun. 2020.

  4. P. K. Jo, T. Zheng, and M. S. Bakir, "Polylithic Integration of 2.5D and 3D Chiplets Using Interconnect Stitching," in Proc. 69th IEEE Electronic Components and Technology Conf. (ECTC), Las Vegas, NV, May. 2019.

  5. P. K. Jo, T. Zheng, and M. S. Bakir, "Multi-Die Polylithic Integration Enabled by Heterogeneous Interconnect Stitching Technology (HIST)," in 27th IEEE Conf. on Electrical Performance of Electronic Packaging and Systems (EPEPS), San Jose, CA, Oct. 2018.

  6. J. L. Gonzalez, P. K. Jo, R. Abbaspour, and M. S. Bakir, "A Disposable and Self-Aligned 3-D Integrated Bio-Sensing Interface Module for CMOS Cell-Based Biosensor Applications," IEEE Electron Device Letters, vol. 39, no. 8, pp. 1215-1218, 2018.

  7. P. K. Jo, M. O. Hossen, X. Zhang, Y. Zhang, and M. S. Bakir, "Heterogeneous Multi-Die Stitching: Technology Demonstration and Design Considerations," in Proc. 68th IEEE Electronic Components and Technology Conf. (ECTC), San Diego, CA, May. 2018.

  8. J. L. Gonzalez, P. K. Jo, R. Abbaspour, and M. S. Bakir, "Flexible Interconnect Design using a Mechanically-focused, Multi-Objective Genetic Algorithm," IEEE Journal of Microelectromechanical Systems, vol. 27, no. 4, pp. 677-685, Aug. 2018.

  9. P. K. Jo, X. Zhang, J. L. Gonzalez, G. S. May, and M. Bakir, "Heterogeneous Multi-Die Stitching Enabled by Fine-Pitch & Multi-Height Compressible MicroInterconnects (CMIs)," IEEE Transactions on Electron Devices, vol. 65, no. 7, pp. 2957-2963, July. 2018.

  10.  P. K. Jo, M. Zia, J. L. Gonzalez, and M. S. Bakir, "Dense and highly elastic compressible microinterconnects (CMIs) for electronic microsystems," in Proc. 67th IEEE Electronic Components and Technology Conf. (ECTC), Orlando, FL, May. 2017.

  11.  H. Oh, X. Zhang, P. K. Jo, G. S. May, and M. S. Bakir, "Monolithic-like heterogeneously integrated microsystems using dense low-loss interconnects," in Proc. IEEE Silicon Monolithic Integrated Circuits in RF Systems (SiRF), Phoenix, AZ, Jan. 2017. (invited).

  12. P. K. Jo, M. Zia, J. L. Gonzalez, H. Oh, and M. S. Bakir, "Design, fabrication, and characterization of dense compressible microinterconnects,"IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 7, no. 7, pp. 1003-1010, May. 2017.

  13. X. Zhang, P. K. Jo, M. Zia, G. May, and M. S. Bakir, "Heterogeneous interconnect stitching technology with compressible microinterconnects for dense multi-die integration," IEEE Electron Device Letters, vol. 38, no. 2, pp. 255-257, Feb. 2017.

  14. M. Zia, T. Chi, J. Park, A. Su, J. L. Gonzalez, P. K. Jo, M. P. Styczynski, H. Wang, and M. S. Bakir, "A 3D integrated electronic microplate platform for lowcost repeatable biosensing applications," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 6, no. 12, pp. 1827-1833, Dec. 2016.