Liquid Cooled S5

Interconnects have become a critical bottleneck in computing performance and efficiency at every level of integration. While the solution to this problem is decreasing interconnect length and increasing system density, the ability to remove heat already limits this approach. Computational density is primarily limited by the large volume of air that must be used to capture heat with a reasonable increase in temperature. By switching to a liquid coolant, such as water, which has a volumetric heat capacity that is more than 3000× higher than that of air (close to standard temperature and pressure), the necessary volume for heat exchange and fluid delivery can be dramatically decreased. In addition to addressing the challenge of decreasing heat sink volume, these heat sinks must be able to address the needs of modern high-power packages. These high-power accelerator packages no longer include a single monolithic die, but several dice mounted in close proximity to one another, usually with an interposer or embedded bridge chips for high-bandwidth interconnection. These dice implement heterogeneous functionalities and may exhibit significant thermal coupling through their shared heat spreader. As microelectronics transition from monolithic dice to large packages of heterogeneous chiplets, heat sinks can also be modified to match these heterogeneous designs. Monolithic and heterogeneous integration of advanced cooling technologies for 2.5D and 3D ICs represent the focus of this thrust. 

Relevant Publications

  1. S. Kochupurackal Rajan, B. Ramakrishnan, H. Alissa, W. Kim, C. Belady and M. S. Bakir, "Integrated Silicon Microfluidic Cooling of a High-Power Overclocked CPU for Efficient Thermal Management," in IEEE Access, vol. 10, pp. 59259-59269, 2022, doi: 10.1109/ACCESS.2022.3179387.

  2. S. Kochupurackal Rajan, A. Kaul, T Sarvey, G. S. May, and M. S. Bakir, "Design Considerations, Demonstration, and Benchmarking of Silicon Micro-cold Plate and Monolithic Microfluidic Cooling for 2.5D ICs," 71st IEEE Electronic Components and Technology Conf. (ECTC),  Jun. 2021.

  3. S. Kochupurackal Rajan, A. Kaul, T. E. Sarvey, G. S. May and M. S. Bakir, "Monolithic Microfluidic Cooling of a Heterogeneous 2.5-D FPGA With Low-Profile 3-D Printed Manifolds," in IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 11, no. 6, pp. 974-982, June 2021.

  4. H. Oh, M. Swaminathan, G. S. May and M. S. Bakir, "Electrical Circuit Modeling and Validation of Through-Silicon Vias Embedded in a Silicon Microfluidic Pin-Fin Heat Sink Filled With Deionized Water," in IEEE Trans. on Comp., Pack. and Manuf. Tech., Aug. 2020.

  5. T. E. Sarvey, A. Kaul, S. K. Rajan, A. Dasu, R. Gutala, and M. S. Bakir, "Microfluidic Cooling of a 14-nm 2.5-D FPGA With 3-D Printed Manifolds for High-Density Computing: Design Considerations, Fabrication, and Electrical Characterization," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 9, no. 12, pp. 2393-2403, 2019.

  6. P. Asrar, X. Zhang, C. E. Green, M. S. Bakir, Y. K. Joshi, "Flow boiling of R245fa in a microgap with staggered circular cylindrical pin fins," Inter. Jour. of Heat and Mass Transfer, Volume 121, Pages 329-342, 2018.

  7. M. H. Nasr, C. E. Green, P. A. Kottke, X. Zhang, T. E. Sarvey, Y. K. Joshi, M. S. Bakir, A. G. Fedorov, "Flow regimes and convective heat transfer of refrigerant flow boiling in ultra-small clearance microgaps," Inter. Jour. of Heat and Mass Transfer, Volume 108, Part B, Pages 1702-1713, 2017.

  8. T. E. Sarvey, Y. Hu, C. E. Green, P. A. Kottke, D. C. Woodrum, Y. K. Joshi, A. G. Fedorov, S. K. Sitaraman, and M. S. Bakir, "Integrated circuit cooling using heterogeneous micropin-fin arrays for nonuniform power maps," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 7, no. 10, pp. 1617-1624, Oct.2017

  9. T. E. Sarvey, Y. Zhang, C. Cheung, R. Gutala. A. Rahman, A. Dasu, and M. S. Bakir, "Monolithic integration of a micropin-fin heat sink in a 28 nm FPGA," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 7, no. 9, pp. 1465-1475, Sep. 2017.

  10.  W. Wahby, T. E. Sarvey, H. Sharma, H. Esmaeilzadeh, and M. S. Bakir, "The impact of 3D stacking on GPU-accelerated deep neural networks an experimental study," in Proc. IEEE Int. 3D Systems Integration Conf. (3DIC), San Francisco, CA, Nov. 2016.

  11. D. Lorenzini, C. Green, T. E. Sarvey, X. Zhang, Y. Hu, A. G. Fedorov, M. S. Bakir, Y. Joshi, "Embedded single phase microfluidic thermal management for non-uniform heating and hotspots using microgaps with variable pin fin clustering," Inter. Jour. of Heat and Mass Transfer, Volume 103, Pages 1359-1370, 2016.

  12. Y. Zhang, T. E. Sarvey, Y. Zhang, M. Zia and M. S. Bakir, "Numerical and experimental exploration of thermal isolation in 3D systems using air gap and mechanically flexible interconnects," in IEEE International Interconnect Technology Conf. / Advanced Metallization Conf. (IITC/AMC), San Jose, CA, May. 2016.

  13. P. Asrar, X. Zhang, C. E. Green, P. A. Kottke, T. E. Sarvey, A. G. Fedorov, M. S. Bakir, and Y. K. Joshi, "Flow boiling of R245fa in a microgap with integrated staggered pin fins," in IEEE Intersociety Conf. on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM), Las Vegas, NV, May 2016.

  14. M. H. Nasr, C. E. Green, P. E. Kottke, X. Zhang, T. E. Sarvey, Y. K. Joshi, M. S. Bakir, A. G. Fedorov, "Extreme-microgap based hotspot thermal management with refrigerant flow boiling," in IEEE Intersociety Conf. on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM), Las Vegas, NV, May 2016.

  15. H. Oh, X. Zhang, G. May, and M. Bakir, "High-frequency analysis of embedded microfluidic cooling within 3-D ICs using a TSV testbed," in Proc. 66th IEEE Electronic Components and Technology Conf. (ECTC), Las Vegas, NV, May. 2016.

  16. R. Abbaspour, D. C. Woodrum, P. A. Kottke, T. E. Sarvey, C. E. Green, Y. K. Joshi, A. G. Fedorov, S. K. Sitaraman, and M. S. Bakir, "Combined finned microgap with dedicated extreme-microgap hotspot flow for high performance thermal management," in IEEE Intersociety Conf. on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM), Las Vegas, NV, May 2016.

  17. P. Asrar, X. Zhang, C. E. Green, P. A. Kottke, T. E. Sarvey, A. G. Fedorov, M. S. Bakir, Y. K. Joshi, "Flow visualization of two phase flow of R245fa in a microgap with integrated staggered pin fins," in Thermal Measurement, Modeling & Management Symposium (SEMI-THERM), San Jose, CA, Mar. 2016.

  18. X. Zhang,  M. H. Nasr, D. C. Woodrum, C. E. Green, P. A. Kottke, T. E. Sarvey, Y. K. Joshi, S. K. Sitaraman, A. G. Fedorov, and M. S. Bakir, "Design, microfabrication and thermal characterization of the hotspot cooler testbed for convective boiling experiments in extreme-micro-gap with integrated micropin-fins and heat Loss minimization," in IEEE Intersociety Conf. on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM), Las Vegas, NV, May 2016.

  19. H. Oh, G. May, and M. Bakir, "Analysis of signal propagation through TSVs within distilled water for liquid-cooled microsystems," IEEE Transaction Electron Devices, vol. 63, no. 3, pp. 1176-1181, Mar. 2016.

  20. X. Zhang, X. Han, T. E. Sarvey, C. E. Green, P. A. Kottke, A. G. Fedorov, Y. Joshi, and M. S. Bakir, "3D IC with embedded microfluidic cooling technology, thermal performance, and electrical implications," ASME Journal of Electronic Packaging, vol. 138, pp. 1-6, Mar. 2016.

  21. C. Green, P. Kottke, X. Han, C. Woodrum, T. E. Sarvey, P. Asrar, X. Zhang, Y. Joshi, A. Fedorov, S. Sitaraman, M. S. Bakir, "A review of two-phase forced cooling in three-dimensional stacked electronics: technology integration," ASME Journal of Electronic Packaging, vol 137, pp. 1-9, Dec. 2015.

  22. H. Oh, Y. Zhang, L. Zheng, G. S. May, and M. S. Bakir, "Fabrication and characterization of electrical interconnects and microfluidic cooling for 3D ICs with silicon interposer," Heat Transf. Eng., vol. 7632, pp. 1-41, Dec. 2015 (Invited).

  23. Y. Zhang, Y. Zhang, T. E. Sarvey, C. Zhang, M. Zia, M. S. Bakir, "Thermal isolation using air gap and mechanically flexible interconnects for heterogeneous 3D ICs," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 6. no. 1, pp. 31-39, Dec. 2015.

  24. L. Zheng, Y. Zhang, and M. Bakir, "A Silicon interposer platform utilizing microfluidic cooling for high-performance computing systems," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 5, pp. 1379-1386, Oct. 2015.

  25. T. E. Sarvey, Y. Zhang, L. Zheng, P. Thadesar, R. Gutala, C. Cheung, A. Rahman, M. S. Bakir, "Embedded cooling technologies for densely integrated electronic systems," in Proc. IEEE Custom Integrated Circuits Conf. (CICC), Oct. 2015. (invited)

  26. C. E. Green, P. E. Kottke, T. E. Sarvey, A. G. Federov, Y. Joshi, M. S. Bakir, "Performance and integration implications of addressing localized hotspots through two approaches: clustering of micro pin-fins and dedicated microgap coolers," in Proc. Int. Tech. Conf. and Expo. Packaging and Integration of Electronic and Photonic Microsystems and Int. Conf. Nanochannels, Microchannels, and Minichannels (InterPACKICNMM), San Francisco, CA, July 2015.

  27. H. Oh, J. M. Gu, S. J. Hong, G. S. May, and M. S. Bakir, "High-aspect ratio through-silicon vias for the integration of microfluidic cooling with 3D microsystems," Microelectronic Engineering, vol. 142, pp. 30-35, July 2015.

  28. . X. Zhang, X. Han, T. E. Sarvey, C. E. Green, P. A. Kottke, A. G. Fedorov, Y. Joshi, and M. S. Bakir, "3D IC with embedded microfluidic cooling: technology, thermal performance, and electrical implications," in Proc. Int. Tech. Conf. and Expo. Packaging and Integration of Electronic and Photonic Microsystems and Int. Conf. Nanochannels, Microchannels, and Minichannels (InterPACKICNMM), San Francisco, CA, July 2015.

  29. L. Zheng, Y. Zhang, X. Zhang, and M. Bakir, "Silicon interposer with embedded microfluidic cooling for high-performance computing systems," in Proc. 65th IEEE Electronic Components and Technology Conf. (ECTC), San Diego, CA, May 2015.

  30. D. C. Woodrum, T. Sarvey, M. S. Bakir and S. K. Sitaraman, "Reliability study of micro-pin fin array for on-chip cooling," in Proc. 65th IEEE Electronic Components and Technology Conf. (ECTC), San Diego, CA, May 2015.

  31. Y. Zhang, T. E. Sarvey, and M. S. Bakir, "Thermal challenges for heterogeneous 3D ICs and opportunities for air gap thermal isolation," in Proc. IEEE Int. 3D Systems Integration Conf. (3DIC), Cork, Ireland, Dec. 2014.

  32. H. Oh, Y. Zhang, L. Zheng, and M. Bakir,"Electrical interconnect and microfluidic cooling within 3D ICs and silicon interposer," in Proc. Int. Tech. Conf. and Expo. Packaging and Integration of Electronic and Photonic Microsystems and Int. Conf. Nanochannels, Microchannels, and Minichannels (InterPACKICNMM), Chicago, IL, Aug. 2014.

  33. P. Thadesar, L. Zheng, and M. Bakir, "Low-loss silicon interposer for three-dimensional system integration with embedded microfluidic cooling," in Proc. IEEE VLSI Technology Symposium, Honolulu, HI, June 2014.

  34. T. E. Sarvey, Y. Zhang, Y. Zhang, H. Oh, and M. S. Bakir, "Thermal and electrical effects of staggered micropin-fin dimensions for cooling of 3D microsystems,"in IEEE Intersociety Conf. on Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM), Orlando, FL, May 2014.

  35. L. Zheng, Y. Zhang, and M. Bakir, "Novel electrical and fluidic microbumps for silicon interposer and 3D-ICs," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 4, no. 5, pp. 777-785, May 2014.

  36. S. A. Isaacs, Y. Joshi, Y. Zhang, M. Bakir, and Y. J. Kim, "Two-phase flow and heat transfer in pin-fin enhanced micro-gaps with non-uniform heating," in Proc. ASME Int. Conf. on Micro/Nanoscale Heat and Mass Transfer, Hong Kong, China, Dec. 2013.

  37. Y. Zhang, L. Zheng, and M. S. Bakir, "3-D stacked tier-specific microfluidic cooling for heterogeneous 3-D ICs," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 3, no. 11, pp. 1811-1819, Nov. 2013.

  38. Y. Zhang, A. Dembla, and M. S. Bakir, "Silicon micropin-fin heat sink with integrated TSVs for 3-D ICs: trade-off analysis and experimental testing," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 3, no. 11, pp. 1842-1850, Nov. 2013.

  39. Y. Zhang, H. Oh, and M. Bakir, "Within-tier cooling and thermal isolation technologies for heterogeneous 3D ICs," in Proc. IEEE Int. 3D Systems Integration Conf. (3DIC), San Francisco, CA, Oct. 2013.

  40. H. Oh, A. Dembla, Y. Zhang, and M. Bakir "High aspect ratio TSVs in micro-pinfin heat sinks for 3D ICs," in Proc. SRC TECHCON, Austin, TX, Sep. 2013.

  41. Y. Zhang, L. Zheng, and M. Bakir, "Tier-independent microfluidic cooling for heterogeneous 3D ICs with nonuniform power dissipation," in Proc. IEEE International Interconnect Technology Conf. (IITC), Kyoto, Japan, June 2013.

  42. L. Zheng, Y. Zhang and M. Bakir, "Design, fabrication and assembly of novel electrical and microfluidic I/Os for 3-D chip stack and silicon interposer," in Proc. 63rd IEEE Electronic Components and Technology Conf. (ECTC), Las Vegas, NV, May 2013.

  43. Y. Zhang and M. S. Bakir, "Independent interlayer microfluidic cooling for heterogeneous 3D IC applications," Electronics Letters, vol. 49, no. 6, pp. 404-406, Mar. 2013.

  44. A. Dembla, Y. Zhang, and M. Bakir, "Fine pitch TSV integration in silicon micropin-fin heat sinks for 3D ICs," in Proc. SRC TECHCON, Austin, TX, Sep. 2012.

  45. A. Dembla, Y. Zhang, and M. Bakir, "High aspect ratio TSVs in micropin-fin heat sinks for 3D ICs," in Proc. IEEE Int. Conf. Nanotechnology, Birmingham, England, Aug. 2012.

  46. S. A. Isaacs, Yoon Jo Kim, A. J. McNamara, Y. Joshi, Y. Zhang and M. S. Bakir, "Two-phase flow and heat transfer in pin-fin enhanced micro-gaps," 13th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, San Diego, CA, 2012, pp. 1084-1089.

  47. A. Dembla, Y. Zhang, and M. Bakir, "Fine pitch TSV integration in silicon micropin-fin heat sinks for 3D ICs," in Proc. IEEE International Interconnect Technology Conf. (IITC), San Jose, CA, June 2012.

  48. Y. Zhang, A. Dembla, Y. Joshi, and M. Bakir, "3D stacked microfluidic cooling for high-performance 3D ICs" in Proc. 62nd IEEE Electronic Components and Technology Conf. (ECTC), San Diego, CA, 2012.

  49. Y. Zhang, C. King, J. Zaveri, Y. J. Kim, V. Sahu, Y. Joshi, and M. Bakir, "Coupled electrical and thermal 3D IC centric microfluidic heat sink design and technology," in Proc. 61st IEEE Electronic Components and Technology Conf. (ECTC), Orlando, FL, May 2011.

  50. C. King, J. Zaveri, M. Bakir, and J. Meindl, "Electrical and fluidic C4 interconnections for inter-layer liquid cooling of 3D ICs," in Proc. IEEE Electronic Components and Technology Conf., pp. 822-828, 2010.

  51. B. Dang, M. Bakir, D. Sekar, and J. Meindl, "Single and 3D chip cooling using microchannels and microfluidic chip input/output (I/O) interconnects," IEEE Transaction on Advanced Packaging, vol. 3, no. 1, pp. 79-87, Feb. 2010.

  52. J. Zaveri, C. King Jr., H.S. Yang, M.S. Bakir, "Wafer level batch fabrication of silicon microchannel heat sinks and electrical through silicon vias for 3D ICs," IMAPS 42nd International Symposium on Microelectronics, 2009.

  53. C. King, J. Zaveri, H. S. Yang, M. Bakir, and J. Meindl "Electro-fluidic C4 interconnections for inter-layer liquid cooling of 3D ICs," in Proc. SRC TECHCON, 2009.

  54. J. Zaveri, C. King, H. Yang, and M. Bakir, "Wafer level batch fabrication of silicon microchannel heat sinks and electrical through silicon vias" in Proc. SRC TECHCON, 2009.

  55. D. Sekar, C. King, B. Dang, M. Bakir, J. Meindl, "Removing heat from 3D stacked chips," Future Fab International, Vol. 29, no. 4, pp. 80-85, Apr. 2009. (invited)

  56. M. Bakir, G. Huang, D. Sekar, and C. King, "3D system integration: power delivery, cooling, and signaling," IETE Technical Review, vol. 26, no. 6, pp. 407-416, 2009. (invited)

  57. B. Dang, M. Bakir, D. Sekar, C. King, and J. Meindl, "Single and 3D Chip Cooling using Microchannels and Fluidic I/Os," in Integrated Interconnect Technologies for 3D Nanoelectronic Systems, M. Bakir and J. Meindl (Eds.), Artech House 2009.

  58. M. Bakir and G. Huang, “Power Delivery, Signaling and Cooling for 3D Integrated Systems,” MRS Proceedings, vol. 1156, Jan. 2009.

  59. M. S. Bakir, C. King, D. Sekar, and B. Dang, “Electrical, optical, and fluidic interconnect networks for 3D heterogeneous integrated systems,” 2008 IEEE Avionics, Fiber-Optics and Photonics Technology Conference, Sep. 2008.

  60. M. S. Bakir, C. King, D. Sekar, H. Thacker, B. Dang, G. Huang, A. Naeemi, and J. D. Meindl, “3D heterogeneous integrated systems: Liquid cooling, power delivery, and implementation,” 2008 IEEE Custom Integrated Circuits Conference, Sep. 2008.

  61. Bakir, M.S., Sekar, D., Dang, B., King, C. and Meindl, J.D., Georgia Tech Research Corp, 2011. 3-D ICs with microfluidic interconnects and methods of constructing same. U.S. Patent 7,928,563.

  62. C. King, D. Sekar, M. Bakir, B. Dang, J. Pikarsky, and J. Meindl, "3D stacking of chips with electrical and microfluidic I/O interconnects," in Proc. SRC TECHCON, 2008.

  63. D. Sekar, C. King, B. Dang, T. Spencer, H. Thacker, P. Joseph, M. Bakir, and J. Meindl, “A 3D-IC Technology with Integrated Microchannel Cooling,” 2008 International Interconnect Technology Conference, Jun. 2008.

  64. M. S. Bakir, B. Dang, and J. D. Meindl, “Electrical, Optical and Thermofluidic Chip I/O Interconnections,” ASME 2007 InterPACK Conference, Volume 1, Jul. 2007.

  65. M. Bakir, B. Dang, G. Huang, and J. Meindl, "Limits and opportunities for heat removal and power delivery to gigascale systems," in Proc. SEMATECH Thermal and Design Issues in 3D ICs, 2007. (invited) Paper featured in multiple trade journal articles.

  66. C. King, D. Sekar, M. Bakir, B. Dang, J. Pikarsky, J. Meindl, "Assembly techniques for microfluidic networks in three-dimensional integrated circuits," SRC TECHCON, 2007.

  67. B. Dang, M. S. Bakir, and J. D. Meindl, "Integrated thermal-fluidic I/O interconnects for an on-chip microchannel heat sink," IEEE Electron Device Letters, vol. 27, no. 2, pp. 117-119, Feb. 2006.

  68. B. Dang, P. Joseph, M. Bakir, P. Kohl, J. Meindl, "Fabrication, assembly and testing of an on-chip microfluidic heat sink," in Proc. Int. Symp. of Microelectronics, 2005, TP2:pp.1-5.

  69. B. Dang, P. J. Joseph, X. Wei, M. S. Bakir, P. A. Kohl, Y. K. Joshi, and J. D. Meindl, “A Chip-Scale Cooling Scheme With Integrated Heat Sink and Thermal-Fluidic I/O Interconnects,” in Proc. ASME InterPACK, Jul. 2005.

  70. B. Dang et al., "A Chip-Scale Cooling Scheme With Integrated Heat Sink and Thermal-Fluidic I/O Interconnects," in ASME 2005 Pacific Rim Technical Conference and Exhibition on Integration and Packaging of MEMS, NEMS, and Electronic Systems collocated with the ASME 2005 Heat Transfer Summer Conference, 2005, vol. Advances in Electronic Packaging, Parts A, B, and C, pp. 605-610, doi: 10.1115/ipack2005-73416.

  71. B. Dang, P. Joseph, M. Bakir, T. Spencer, P. Kohl, and J. Meindl, “Wafer-level microfluidic cooling interconnects for GSI,” Proceedings of the IEEE 2005 International Interconnect Technology Conference, Jun. 2005.

  72. B. Dang, P. J. Joseph, M. S. Bakir, P. A. Kohl, Y. K. Joshi, and J. D. Meindl, "A chip-scale cooling scheme with on-chip heat sink and integrated microfluidic I/O interconnects," in Proceedings SRC TECHCON, 2005.