Journal Publications

  1. A. Kaul, Y. Luo, X. Peng, M. Manley, Y.-C. Luo, S. Yu and M. S. Bakir, "3-D Heterogeneous Integration of RRAM-Based Compute-In-Memory: Impact of Integration Parameters on Inference Accuracy," in IEEE Transactions on Electron Devices (TED), doi: 10.1109/TED.2022.3231570.

  2. T. Zheng and M. S. Bakir, "Benchmarking Frequency-Dependent Parasitics of Fine-Pitch Off-Chip I/Os for 2.5D and 3D Heterogeneous Integration," in IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 12, no. 12, pp. 2002-2012, Dec. 2022.

  3. S. Yu, T. K. Gaylord and M. S. Bakir, "Fiber-Array-to-Chip Interconnections With Sub-Micron Placement Accuracy via Self-Aligning Chiplets," in IEEE Photonics Technology Letters, vol. 34, no. 19, pp. 1023-1025, 1 Oct. 2022.

  4. S. Kochupurackal Rajan, B. Ramakrishnan, H. Alissa, W. Kim, C. Belady and M. S. Bakir, "Integrated Silicon Microfluidic Cooling of a High-Power Overclocked CPU for Efficient Thermal Management," in IEEE Access, vol. 10, pp. 59259-59269, 2022, doi: 10.1109/ACCESS.2022.3179387.

  5. M. -J. Li and M. S. Bakir, "3-D Integrated Chiplet Encapsulation (3-D ICE): High-Density Heterogeneous Integration Using SiO2-Reconstituted Tiers," in IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 11, no. 12, pp. 2242-2245, Dec. 2021.

  6. J. L. Gonzalez, J. R. Brescia, T. Zheng, S. Kochupurackal Rajan and M. S. Bakir, "A Die-Level, Replaceable Integrated Chiplet (PINCH) Assembly Using a Socketed Platform, Compressible MicroInterconnects, and Self-Alignment," in IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 11, no. 12, pp. 2069-2076, Dec. 2021.

  7. T. Zheng, P. K. Jo, S. Kochupurackal Rajan and M. S. Bakir, "Electrical Characterization and Benchmarking of Polylithic Integration Using Fused-Silica Stitch-Chips With Compressible Microinterconnects for RF/mm-Wave Applications," in IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 11, no. 11, pp. 1824-1834, Nov. 2021.

  8. X. Peng, A. Kaul, M. S. Bakir and S. Yu, "Heterogeneous 3-D Integration of Multitier Compute-in-Memory Accelerators: An Electrical-Thermal Co-Design," in IEEE Transactions on Electron Devices, vol. 68, no. 11, pp. 5598-5605, Nov. 2021.

  9. J. L. Gonzalez, S. Kochupurackal Rajan, J. R. Brescia and M. S. Bakir, "A Substrate-Agnostic, Submicrometer PSAS-to-PSAS Self-Alignment Technology for Heterogeneous Integration," in IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 11, no. 12, pp. 2061-2068, Dec. 2021.

  10. Y. Hu, M. O. Hossen, Z. Wan, M.S. Bakir, and Y. Joshi, "Compact Transient Thermal Model of Microfluidically Cooled Three-Dimensional Stacked Chips With Pin-Fin Enhanced Microgap," in ASME. J. Electron. Packag., 143(3): 031007, Sep. 2021.

  11. P. Yeon, S. Kochupurackal Rajan, et al., "Microfabrication, Coil Characterization, and Hermetic Packaging of Millimeter-Sized Free-Floating Neural Probes," in IEEE Sensors Journal, vol. 21, no. 12, pp. 13837-13848, 15 June, 2021.

  12. S. Kochupurackal Rajan, A. Kaul, T. E. Sarvey, G. S. May and M. S. Bakir, "Monolithic Microfluidic Cooling of a Heterogeneous 2.5-D FPGA With Low-Profile 3-D Printed Manifolds," in IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 11, no. 6, pp. 974-982, June 2021.

  13. M. -J. Li et al., "Cu–Cu Bonding Using Selective Cobalt Atomic Layer Deposition for 2.5-D/3-D Chip Integration Technologies," in IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 10, no. 12, pp. 2125-2128, Dec. 2020.

  14. P. Jo, S. Kochupurackal Rajan, J. Gonzalez and M. S. Bakir, "Polylithic Integration of 2.5-D and 3-D Chiplets Enabled by Multi-Height and Fine-Pitch CMIs,"  in IEEE Transactions on Components, Packaging and Manufacturing Technology, Jul.2020.

  15. H. Oh, M. Swaminathan, G. S. May and M. S. Bakir, "Electrical Circuit Modeling and Validation of Through-Silicon Vias Embedded in a Silicon Microfluidic Pin-Fin Heat Sink Filled With Deionized Water," in IEEE Trans. on Comp., Pack. and Manuf. Tech., Aug. 2020.

  16. M. Zia, B. Chung, S. Sober, M. S. Bakir, "Flexible Multielectrode Arrays With 2-D and 3-D Contacts for In Vivo Electromyography Recording," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 10, no. 2, pp. 197-202, Feb. 2020.

  17. M. O. Hossen, B. Chava, G. Van der Plas, E. Beyne and M. S. Bakir, "Power Delivery Network (PDN) Modeling for Backside-PDN Configurations With Buried Power Rails and  μ TSVs," in IEEE Trans. on Electron Devices, Jan. 2020.

  18. Y. Zhang, M. O. Hossen, and M. S. Bakir, "Power delivery network modeling and benchmarking for emerging heterogeneous integration technologies," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 9, no. 9, pp. 1825-1834, 2019.

  19. T. E. Sarvey, A. Kaul, S. K. Rajan, A. Dasu, R. Gutala, and M. S. Bakir, "Microfluidic Cooling of a 14-nm 2.5-D FPGA With 3-D Printed Manifolds for High-Density Computing: Design Considerations, Fabrication, and Electrical Characterization," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 9, no. 12, pp. 2393-2403, 2019.

  20. C. Wan, J. L. Gonzalez, T. Fan, A. Adibi, T. K. Gaylord, and M. S. Bakir, "Fiber-Interconnect Silicon Chiplet Technology for Self-Aligned Fiber-to-Chip Assembly," IEEE Photonics Technology Letters, vol. 31, no. 16, pp. 1311-1314, 2019.

  21. Y. Zhang, X. Zhang, and M. S. Bakir, "Benchmarking Digital Die-to-Die Channels in 2.5-D and 3-D Heterogeneous Integration Platforms," IEEE Transactions on Electron Devices, vol. 65, no. 12, pp. 5460-5467, 2018.

  22. M. O. Hossen, J. L. Gonzalez, and M. S. Bakir, "Thermomechanical Analysis and Package-Level Optimization of Mechanically Flexible Interconnects for Interposer-on-Motherboard Assembly," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 8, no. 12, pp. 2081-2089, 2018.

  23. J. L. Gonzalez, P. K. Jo, R. Abbaspour, and M. S. Bakir, "A Disposable and Self-Aligned 3-D Integrated Bio-Sensing Interface Module for CMOS Cell-Based Biosensor Applications," IEEE Electron Device Letters, vol. 39, no. 8, pp. 1215-1218, 2018.

  24. M. Zia, H. Oh, and M. S. Bakir, "Post-CMOS Fabrication Technology Enabling Simultaneous Fabrication of 3-D Solenoidal Micro-Inductors and Flexible I/Os," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 8, no. 11, pp. 2039-2044, 2018.

  25. P. Asrar, X. Zhang, C. E. Green, M. S. Bakir, Y. K. Joshi, "Flow boiling of R245fa in a microgap with staggered circular cylindrical pin fins," Inter. Jour. of Heat and Mass Transfer, Volume 121, Pages 329-342, 2018.

  26. J. L. Gonzalez, P. K. Jo, R. Abbaspour, and M. S. Bakir, "Flexible Interconnect Design using a Mechanically-focused, Multi-Objective Genetic Algorithm," IEEE Journal of Microelectromechanical Systems, vol. 27, no. 4, pp. 677-685, Aug. 2018.

  27. P. K. Jo, X. Zhang, J. L. Gonzalez, G. S. May, and M. Bakir, "Heterogeneous Multi-Die Stitching Enabled by Fine-Pitch & Multi-Height Compressible MicroInterconnects (CMIs)," IEEE Transactions on Electron Devices, vol. 65, no. 7, pp. 2957-2963, July. 2018.

  28. C. Wan, T. K. Gaylord, and M. S. Bakir, "Grating-assisted-cylindrical-resonant-cavities interlayer coupler," Applied Optics, vol. 57, no. 18, pp. 5079-5089, June 2018.

  29. M. H. Nasr, C. E. Green, P. A. Kottke, X. Zhang, T. E. Sarvey, Y. K. Joshi, M. S. Bakir, A. G. Fedorov, "Flow regimes and convective heat transfer of refrigerant flow boiling in ultra-small clearance microgaps," Inter. Jour. of Heat and Mass Transfer, Volume 108, Part B, Pages 1702-1713, 2017.

  30. Y. Zhang, M. O. Hossen, and M. S. Bakir, "Power Delivery Network Benchmarking For Interposer and Bridge-chip Based 2.5-D Integration," in IEEE Electron Device Letters, vol. 39, no. 1, pp. 99-102, Dec. 2017

  31. C. Wan, T. K. Gaylord, and M. S. Bakir, "Circular waveguide grating-via-grating for interlayer coupling," IEEE Photonics Technology Letters, vol. 29, no. 21, pp. 1776-1779, Nov. 2017.

  32. J. C. Ciciliano, R. Abbaspour, J. Woodall, C. Wu, M. S. Bakir, and W. A. Lam, "Probing blood cell mechanics of hematologic processes at the single micron level," Lab on a Chip, vol. 17, no. 22, pp. 3804-3816, Nov. 2017.

  33. T. E. Sarvey, Y. Hu, C. E. Green, P. A. Kottke, D. C. Woodrum, Y. K. Joshi, A. G. Fedorov, S. K. Sitaraman, and M. S. Bakir, "Integrated circuit cooling using heterogeneous micropin-fin arrays for nonuniform power maps," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 7, no. 10, pp. 1617-1624, Oct.2017

  34. C. Zhang, H. S. Yang, and M. S. Bakir, "A double-lithography and double-reflow process and application to multi-pitch multi-height mechanical flexible interconnects," Journal of Micromechanics and Microengineering, vol. 27, no. 2, pp. 025014-1-025014-6, Jan. 2017.

  35. T. E. Sarvey, Y. Zhang, C. Cheung, R. Gutala. A. Rahman, A. Dasu, and M. S. Bakir, "Monolithic integration of a micropin-fin heat sink in a 28 nm FPGA," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 7, no. 9, pp. 1465-1475, Sep. 2017.

  36. Y. Zhang, T. E. Sarvey, and M. S. Bakir, "Thermal evaluation of 2.5-D integration using bridge-chip technology challenges and opportunities", IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 7, no. 7, pp. 1101 - 1110, July 2017.

  37. P. K. Jo, M. Zia, J. L. Gonzalez, H. Oh, and M. S. Bakir, "Design, fabrication, and characterization of dense compressible microinterconnects,"IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 7, no. 7, pp. 1003-1010, May. 2017.

  38. H. Oh, G. May, and M. Bakir, "Heterogeneous integrated microsystems with non-traditional through-silicon via technologies," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 7, no. 4, pp. 502-510, Mar. 2017.

  39. Y. Zhang and M. S. Bakir, "Integrated thermal and power delivery network co-simulation framework for single-die and multi-die assemblies", IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 7, no. 3, pp. 434-443, Feb. 2017.

  40. X. Zhang, P. K. Jo, M. Zia, G. May, and M. S. Bakir, "Heterogeneous interconnect stitching technology with compressible microinterconnects for dense multi-die integration," IEEE Electron Device Letters, vol. 38, no. 2, pp. 255-257, Feb. 2017.

  41. R. Abbaspour, D. K. Brown, and M. S. Bakir, "Fabrication and electrical characterization of sub-micron diameter through-silicon via for heterogeneous three-dimensional integrated circuits," Journal of Micromechanics and Microengineering, vol. 27, no. 2, pp. 025011-1-025011-8, Jan. 2017.

  42. V. Kumar, H. Oh, X. Zhang, L. Zheng, M. S. Bakir, and A. Naeemi, "Impact of on-chip interconnect on the performance of 3D integrated circuits with through silicon vias Part I," IEEE Transaction on Electron Devices, vol. 63, no. 6, pp. 2503-2509, June 2016

  43. X. Zhang, V. Kumar, H. Oh, L. Zheng, G. May, A. Naeemi, and M. S. Bakir, "Impact of on-chip interconnect on the performance of 3D integrated circuits with through silicon vias Part II," IEEE Transactions on Electron Devices, vol. 63, no. 6, pp. 2510-2516, June 2016

  44. D. Lorenzini, C. Green, T. E. Sarvey, X. Zhang, Y. Hu, A. G. Fedorov, M. S. Bakir, Y. Joshi, "Embedded single phase microfluidic thermal management for non-uniform heating and hotspots using microgaps with variable pin fin clustering," Inter. Jour. of Heat and Mass Transfer, Volume 103, Pages 1359-1370, 2016.

  45. M. Zia, C. Zhang, H.S. Yang, L. Zheng and Muhannad Bakir, "Chip-to-chip interconnect integration technologies," IEICE Electron. Express, vol. 13, no. 6, pp. 1-16, Mar. 2016.

  46. X. Zhang, X. Han, T. E. Sarvey, C. E. Green, P. A. Kottke, A. G. Fedorov, Y. Joshi, and M. S. Bakir, "3D IC with embedded microfluidic cooling technology, thermal performance, and electrical implications," ASME Journal of Electronic Packaging, vol. 138, pp. 1-6, Mar. 2016.

  47. L. Zheng, Y. Zhang, and M. Bakir, "Full-Chip Power Supply Noise Time-Domain Numerical Modeling and Analysis for Single and Stacked ICs," IEEE Transaction on Electron Devices, vol. 63, no. 3, pp. 1225-1231, Mar. 2016.

  48. H. Oh, P. A. Thadesar, G. S. May, and M. S. Bakir, "Low-Loss Air-Isolated Through-Silicon Vias for Silicon Interposers," IEEE Microw. Wirel. Components Lett., vol. 26, no. 3, pp. 168-170, Mar. 2016.

  49. P. Thadesar and M. S. Bakir, "Fabrication and characterization of polymer-enhanced TSVs, inductors and antennas for mixed-signal silicon interposer platforms," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 6, no. 3, pp. 455-463, Mar. 2016.

  50. H. Oh, G. May, and M. Bakir, "Analysis of signal propagation through TSVs within distilled water for liquid-cooled microsystems," IEEE Transaction Electron Devices, vol. 63, no. 3, pp. 1176-1181, Mar. 2016.

  51. W. Wahby, L. Zheng, Y. Zhang, M. S. Bakir, "A simulation tool for rapid investigation of trends in 3DIC performance and power consumption," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 6, no. 2, pp. 192-199, Feb. 2016.

  52. H. S. Yang, C. Zhang, and M. S. Bakir, "A self-aligning flip-chip assembly method using sacrificial positive self-alignment structures," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 6, no. 3, pp. 471-477, Feb. 2016.

  53. J. Ciciliano, R. Abbaspour, C. Wu, M. S. Bakir, and W. A. Lam, "A microengineered matrix to decouple the biophysical and biochemical mechanisms of blood cell interactions with thrombi and vascular wall matrices," Blood Journal by American Society of Hematology, vol. 128, no. 22, p. 555, Dec. 2016.

  54. M. Zia, T. Chi, J. Park, A. Su, J. L. Gonzalez, P. K. Jo, M. P. Styczynski, H. Wang, and M. S. Bakir, "A 3D integrated electronic microplate platform for lowcost repeatable biosensing applications," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 6, no. 12, pp. 1827-1833, Dec. 2016.

  55. C. Wan, T. K. Gaylord, and M. S. Bakir, "Rigorous coupled-wave analysis equivalent-index-slab method for analyzing 3D angular misalignment in interlayer grating couplers," Applied Optics, vol. 55, no.35, pp. 10006-10015, Dec. 2016.

  56. C. Zhang, H. S. Yang, H. D. Thacker, I. Shubin, J. E. Cunningham, and M. S. Bakir, "Mechanically flexible interconnects with contact tip for rematable heterogeneous system integration," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 6, no. 11, pp. 1587-1594, Oct. 2016.

  57. C. Wan, T. K. Gaylord, and M. S. Bakir, "Grating design for interlayer optical interconnection of in-plane waveguides," Applied Optics, vol. 55, no.10, pp. 2601-2610, Oct. 2016.

  58. C. Wan, T. K. Gaylord, and M. S. Bakir, "RCWA-EIS method for interlayer grating coupling," Applied Optics, vol. 55, no. 22, pp. 5900-5908, Aug. 2016.

  59. P. Thadesar, X. Gu, R. Alapati and M. S. Bakir, "TSVs: Drivers, performance and innovations (Invited)," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 6, no. 3, pp. 455-463, July 2016.

  60. X. Liu, P. Thadesar, C. Taylor, M. Kunz, N. Tamura, M. Bakir, and S. Sitaraman, "Experimental stress characterization and numerical simulation for copper pumping analysis of through silicon vias (Invited)," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 6, no. 7, pp. 993-999, July 2016

  61. H. Oh, Y. Zhang, L. Zheng, G. S. May, and M. S. Bakir, "Fabrication and characterization of electrical interconnects and microfluidic cooling for 3D ICs with silicon interposer," Heat Transf. Eng., vol. 7632, pp. 1-41, Dec. 2015 (Invited).

  62. Y. Zhang, Y. Zhang, T. E. Sarvey, C. Zhang, M. Zia, M. S. Bakir, "Thermal isolation using air gap and mechanically flexible interconnects for heterogeneous 3D ICs," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 6. no. 1, pp. 31-39, Dec. 2015.

  63. C. Green, P. Kottke, X. Han, C. Woodrum, T. E. Sarvey, P. Asrar, X. Zhang, Y. Joshi, A. Fedorov, S. Sitaraman, M. S. Bakir, "A review of two-phase forced cooling in three-dimensional stacked electronics: technology integration," ASME Journal of Electronic Packaging, vol 137, pp. 1-9, Dec. 2015.

  64. L. Zheng, Y. Zhang, and M. Bakir, "A Silicon interposer platform utilizing microfluidic cooling for high-performance computing systems," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 5, pp. 1379-1386, Oct. 2015.

  65. H. Oh, J. M. Gu, S. J. Hong, G. S. May, and M. S. Bakir, "High-aspect ratio through-silicon vias for the integration of microfluidic cooling with 3D microsystems," Microelectronic Engineering, vol. 142, pp. 30-35, July 2015.

  66. Y. Zhang, Y. Zhang, M. S. Bakir, "Thermal design and constraints for heterogeneous integrated chip stacks and isolation technology using air gap and thermal bridge," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol.4, no.12, pp.1914-1924, Dec. 2014.

  67. H. S. Yang, C. Zhang, and M. Bakir, "Self-aligned silicon interposer tiles and silicon bridges using positive self-alignment structures and rematable mechanically flexible interconnects", IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 4, no. 11, pp. 1760-1768, Nov. 2014.

  68. X. Liu, P. Thadesar, C. Taylor, H. Oh, M. Kunz, N. Tamura, M. Bakir, and S. Sitaraman, "In-situ microscale through-silicon via strain measurements by synchrotron x-ray microdiffraction exploring the physics behind data interpretation," Applied Physics Letters, vol.105, no.11, p.112109, Sep. 2014.

  69. H. S. Yang, C. Zhang, and M. Bakir, "Self-aligning silicon interposer tiles and silicon bridges for large nanophotonics enabled systems", Electronics Letters, vol. 50, no. 20, pp. 1475-1477, Sep. 2014.

  70. V. Kumar, R. Sharma, E. Uzunlar, L. Zheng, R. Bashirullah, P. Kohl, M. S. Bakir, and A. Naeemi, "Airgap interconnects: modeling, optimization, and benchmarking for backplane, PCB, and interposer applications," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol.4, no.8, pp.1335-1346, Aug. 2014.

  71. J. M. Gu, P. Thadesar, A. Dembla, M. S. Bakir, G. S. May, and S. J. Hong "Endpoint detection in low open area TSV fabrication using optical emission spectroscopy," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 4, no. 7, pp. 1251-1260, July 2014.

  72. C. Zhang, H. S. Yang, and M. Bakir, "Mechanically flexible interconnects (MFIs) with highly scalable pitch," Journal of Micromechanics and Microengineering, vol. 24, no. 5, pp. 055024, May 2014.

  73. L. Zheng, Y. Zhang, and M. Bakir, "Novel electrical and fluidic microbumps for silicon interposer and 3D-ICs," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 4, no. 5, pp. 777-785, May 2014.

  74. Y. Zhang, A. Dembla, and M. S. Bakir, "Silicon micropin-fin heat sink with integrated TSVs for 3-D ICs: trade-off analysis and experimental testing," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 3, no. 11, pp. 1842-1850, Nov. 2013.

  75. Y. Zhang, L. Zheng, and M. S. Bakir, "3-D stacked tier-specific microfluidic cooling for heterogeneous 3-D ICs," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 3, no. 11, pp. 1811-1819, Nov. 2013.

  76. C. Zhang, H. S. Yang, and M. Bakir, "Highly elastic gold passivated mechanically flexible interconnects," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 3, no. 10, pp. 1632-1639, Oct. 2013.

  77. X. Liu, P. Thadesar, C. Taylor, M. Kunz, N. Tamura, M. Bakir, and S. Sitaraman, "Dimension and liner dependent thermomechanical strain characterization of through-silicon vias using synchrotron x-ray diffraction," Journal of Applied Physics, vol. 114, no. 6, pp. 064908, Aug. 2013.

  78. X. Liu, P. Thadesar, C. Taylor, M. Kunz, N. Tamura, M. Bakir, and S. Sitaraman, "Thermomechanical strain measurements by synchrotron x-ray diffraction and data interpretation for through-silicon vias," Applied Physics Letters , vol. 103, no. 2, pp. 022107-1-022107-5, July 2013.

  79. P. Thadesar and M. Bakir, "Novel photo-defined polymer-enhanced through-silicon vias for silicon interposers," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol. 3, no. 7, pp. 1130-1137, July 2013.

  80. P. Thadesar and M. Bakir, "Novel photodefined polymer-embedded vias for silicon interposers," Journal of Micromechanics and Microengineering, vol. 23, no. 3, pp. 035003-1-035003-6, Mar. 2013.

  81. Y. Zhang and M. S. Bakir, "Independent interlayer microfluidic cooling for heterogeneous 3D IC applications," Electronics Letters, vol. 49, no. 6, pp. 404-406, Mar. 2013.

  82. H. S. Yang, M. S. Bakir, "Design, fabrication, and characterization of freestanding mechanically flexible interconnects using curved sacrificial layer," IEEE Transaction on Components, Packaging and Manufacturing Technology, vol.2, no.4, pp.561-568, Apr. 2012

  83. H. S. Yang, R. Ravindran, C. Zhang, P. Modarres, and M. Bakir, "Enabling technologies for 3D stacking of disposable electronic biosensor and CMOS Chips," Future Fab International, pp. 80-85, Oct. 2011. (invited)

  84. B. Dang, M. Bakir, D. Sekar, and J. Meindl, "Single and 3D chip cooling using microchannels and microfluidic chip input/output (I/O) interconnects," IEEE Transaction on Advanced Packaging, vol. 3, no. 1, pp. 79-87, Feb. 2010.

  85. J.-H Lai, H. S. Yang, H. Chen, C. King, J. Zaveri, R. Ravindran, and M. Bakir, "A 'mesh' seed layer for improved through-silicon-via fabrication," Journal of Micromechanics and Microengineering, vol. 20, no. 2, pp. 025016-1-025016-6, Jan. 2010.

  86. D. Sekar, C. King, B. Dang, M. Bakir, J. Meindl, "Removing heat from 3D stacked chips," Future Fab International, Vol. 29, no. 4, pp. 80-85, Apr. 2009. (invited)

  87. M. Bakir, G. Huang, D. Sekar, and C. King, "3D system integration: power delivery, cooling, and signaling," IETE Technical Review, vol. 26, no. 6, pp. 407-416, 2009. (invited)

  88. M. Bakir, A. Glebov, M. Lee, P. Kohl, and J. Meindl, "Mechanically flexible chip-to-substrate optical interconnections using optical pillars," IEEE Transaction on Adv. Packaging, vol. 31, no. 1, pp. 143-153, Feb. 2008.

  89. M. Bakir, B. Dang, O. Ogunsola, R. Sarvari, and J. Meindl, "Electrical and optical chip I/O interconnections for gigascale systems," IEEE Transaction on Electron Devices, vol. 54, no. 9, pp. 2426-2437, Sep. 2007.

  90. O. Ogunsola, H. D. Thacker, B. L. Bachim, M. S. Bakir, J. Pikarsky, T. K. Gaylord, and J. D. Meindl, "Chip-level waveguide-mirror-pillar optical interconnect structure," IEEE Photon. Technol. Lett., vol. 18, no. 15, pp. 1672-1674, Aug. 2006.

  91. B. Dang, M. S. Bakir, C. S. Patel, H. D. Thacker, and J. D. Meindl, "Sea-of-Leads MEMS I/O interconnects for low-k IC packaging," IEEE J. Microelectromechanical Systems, vol. 15, no. 3, pp. 523-530, June 2006.

  92. L. Glebov, D. Bhusari, P. Kohl, M. Bakir, J. Meindl, and M. G. Lee, "Flexible pillars for displacement compensation in optical chip assembly," IEEE. Photon. Technol. Lett., vol. 18, no. 6, pp. 974-976, Apr. 2006.

  93. B. Dang, M. S. Bakir, and J. D. Meindl, "Integrated thermal-fluidic I/O interconnects for an on-chip microchannel heat sink," IEEE Electron Device Letters, vol. 27, no. 2, pp. 117-119, Feb. 2006.

  94. M. S. Bakir, B. Dang, R. Emery, G. Vandentop, P. A. Kohl, and J. D. Meindl, "Sea of Leads compliant I/O interconnection process integration for the ultimate enabling of chips with low-k interlayer dielectrics," IEEE J. Adv. Packag., vol. 28, no. 3, pp. 488-494, Aug. 2005.

  95. M. S. Bakir, C. O. Chui, A. K. Okyay, K. C. Saraswat, and J. D. Meindl, "Integration of optical polymer pillars chip I/O interconnections with Si MSM photodetectors," IEEE Transaction on Electron Devices, vol. 51, no. 7, pp. 1084-1090, July 2004.

  96. M. S. Bakir and J. D. Meindl, "Sea of polymer pillars electrical and optical chip I/O interconnections for gigascale integration," IEEE Transaction Electron Devices, vol. 51, no. 7, pp. 1069-1077, July 2004.

  97. M. S. Bakir, T. K. Gaylord, O. O. Ogunsola, E. G. Glytsis, and J. D. Meindl, "Optical transmission of polymer pillars for chip I/O optical interconnections," IEEE Photon. Technol. Lett., vol. 16, no. 1, pp. 117-119, Jan. 2004.

  98. M. S. Bakir, T. K. Gaylord, K. P. Martin, and J. D. Meindl, "Sea of polymer pillars: compliant wafer-level electrical-optical chip I/O interconnections," IEEE Photon. Technol. Lett., vol. 15, no. 11, pp. 1567-1569, Nov. 2003.

  99. M. S. Bakir, H. A. Reed, H. D. Thacker, P. A. Kohl, K. P. Martin, and J. D. Meindl, "Sea of leads (SoL) ultrahigh density wafer-level chip input/output interconnections for gigascale integration (GSI)," IEEE Trans. Electron Devices, vol. 50, no. 10, pp. 2039-2048, Oct. 2003.

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